The proposed design uses approximately 10% more hardware and has 33% more delay compared to a conventional double precision floatingpoint multiplier.
📌 3 Key Takeaways
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Objective & Hypothesis:Modern graphic processors, multimedia processors, and general-purpose processors with multimedia extensions provide SIMD floating-point instructions.
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Key Findings & Data:SIMD floating-point multiplication is commonly used in 2D and 3D applications, which mostly use single precision floating-point operands.
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Conclusion & Impact:The proposed design uses approximately 10% more hardware and has 33% more delay compared to a conventional double precision floatingpoint multiplier.
🔬Design:Research Article
📍Scope:Comprehensive Sample
⚙️Variables:Domain Parameters
Abstract
Modern graphic processors, multimedia processors, and general-purpose processors with multimedia extensions provide SIMD floating-point instructions. SIMD floating-point multiplication is commonly used in 2D and 3D applications, which mostly use single precision floating-point operands. Consequently, efficient single precision multiplier units are crucial for high performance systems. This paper introduces a novel floating point multiplier that can perform either a double precision or two parallel single-precision floating-point multiplications. The proposed design uses approximately 10% more hardware and has 33% more delay compared to a conventional double precision floatingpoint multiplier.
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Cite This Article
GÖK, M., ÖZBİLEN, M. M. (2022). A single/double precision floating-point multiplier design for multimedia applications. Istanbul University Journal of Electrical and Electronics Engineering, Cilt: 9 - Sayı: 1, 827–831. https://ajindex.com/articles/543759
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