Dergiler / Dicle Üniversitesi Mühendislik Fakültesi Mühendislik Dergisi / 2025 / Cilt: 16 Sayı: 4

FPGA-Based Cosimulation of S-Box Constitution from Fractional Order Liu System

Ömer Türk(Mardin Artuklu University)0000-0002-0060-1880
Sayfa
971–981
Yayın Tarihi
2025-12-30
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⚡ TL;DR(1 Cümlede Hızlı Çıkarım)

The performance analyzes shown that the design was satisfactory.

📌 3 Maddede Bu Makale

🎯
Amaç & Hipotez:Substitution box(S-box) has an important duty in encryption.
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Temel Bulgular & Veri:The design was implemented by using Xilinx System Generator(XSG) toolbox in MATLAB/Simulink software in single precision floating point numbers format and a low cost Basys 3 FPGA trainer card was used.
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Sonuç & Katkı:The performance analyzes shown that the design was satisfactory.
🔬Tür:Araştırma Makalesi
📍Kapsam:Genişletilmiş Akademik Örneklem
⚙️Değişkenler:S-box · fractional order systems · Liu chaotic system

Özet

Substitution box(S-box) has an important duty in encryption. In recent years plenty of S-box designs by chaotic systems have been studied. In this paper a high speed S-box constitution from fractional order Liu system on FPGA is proposed. The design was implemented by using Xilinx System Generator(XSG) toolbox in MATLAB/Simulink software in single precision floating point numbers format and a low cost Basys 3 FPGA trainer card was used. In addition, numerical fractional order equations was solved by using Grünwald-Letnikov(GL) method with 1024 elements length. The S-box table was constructed about 0.137s. After all performance analyzes as nonlinearity, strict avalanche criterion, differential probability, bits independent criterion, and equiprobable input/output XOR distribution, were performed. The performance analyzes shown that the design was satisfactory.

Abstract

Substitution box(S-box) has an important duty in encryption. In recent years plenty of S-box designs by chaotic systems have been studied. In this paper a high speed S-box constitution from fractional order Liu system on FPGA is proposed. The design was implemented by using Xilinx System Generator(XSG) toolbox in MATLAB/Simulink software in single precision floating point numbers format and a low cost Basys 3 FPGA trainer card was used. In addition, numerical fractional order equations was solved by using Grünwald-Letnikov(GL) method with 1024 elements length. The S-box table was constructed about 0.137s. After all performance analyzes as nonlinearity, strict avalanche criterion, differential probability, bits independent criterion, and equiprobable input/output XOR distribution, were performed. The performance analyzes shown that the design was satisfactory.

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Bu Makaleye Atıf Yap

Arserim, M. A., Türk, Ö. (2025). FPGA-Based Cosimulation of S-Box Constitution from Fractional Order Liu System. Dicle Üniversitesi Mühendislik Fakültesi Mühendislik Dergisi, Cilt: 16 Sayı: 4, 971–981. https://doi.org/10.24012/dumf.1822418

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