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Journals / Istanbul University Journal of Electrical and Electronics Engineering / 2006 / Cilt: 6 - Sayı: 2

A fast multiplier hardware design for interval arithmetic

Ahmet SERTBAŞ
Fethullah KARABİBER
Hani EL-ABDALLAH
Pages
169–174
Publication Date
2022-10-18
DOI
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AI Summary & Key Takeaways

AI Insight
⚡ TL;DR(Too Long; Didn't Read)

Compared to previous hardware interval multipliers, our design is faster, but, requires more area.

📌 3 Key Takeaways

🎯
Objective & Hypothesis:In this paper, a new parallel hardware unit for interval multiplication is presented.
📊
Key Findings & Data:Using the VHDL synthesis results, the area and delay estimates for the new design are given.
💡
Conclusion & Impact:Compared to previous hardware interval multipliers, our design is faster, but, requires more area.
🔬Design:Research Article
📍Scope:Comprehensive Sample
⚙️Variables:Domain Parameters

Abstract

In this paper, a new parallel hardware unit for interval multiplication is presented. Using the VHDL synthesis results, the area and delay estimates for the new design are given. Compared to previous hardware interval multipliers, our design is faster, but, requires more area.

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Cite This Article

SERTBAŞ, A., KARABİBER, F., EL-ABDALLAH, H. (2022). A fast multiplier hardware design for interval arithmetic. Istanbul University Journal of Electrical and Electronics Engineering, Cilt: 6 - Sayı: 2, 169–174. https://ajindex.com/articles/543827

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References (10)

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