Dergiler / Turkish Journal of Electrical Engineering and Computer Science / 2018 / Cilt: 26 - Sayı: 5

A comparative analysis of 1-level multiplier-free discrete wavelet transform implementations on FPGAs

Sayfa
2194–2205
Yayın Tarihi
2018-10-01
DOI
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⚡ TL;DR(1 Cümlede Hızlı Çıkarım)

The results reveal that the DAA-based approach is appropriate for a small number of filter taps, while the RNS-based approach would be more appropriate for more than 10 filter taps, yet both DAA- and RNS-based approaches offer high signal quality with peak signal-to-noise ratio as 73.5 and 56.5 dB, respectively.

📌 3 Maddede Bu Makale

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Amaç & Hipotez:In this article, we investigated the design and implementation aspects of multilevel discrete wavelet transform (DWT) by employing a finite impulse response filter on field programmable gate array platform.
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Temel Bulgular & Veri:Our goal is to estimate the performance requirements and hardware resources for each approach, allowing for selection of the proper algorithm and implementation of multilevel DAA- and RNS-based DWT.
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Sonuç & Katkı:The results reveal that the DAA-based approach is appropriate for a small number of filter taps, while the RNS-based approach would be more appropriate for more than 10 filter taps, yet both DAA- and RNS-based approaches offer high signal quality with peak signal-to-noise ratio as 73.5 and 56.5 dB, respectively.
🔬Tür:Araştırma Makalesi
📍Kapsam:Genişletilmiş Akademik Örneklem
⚙️Değişkenler:Discrete wavelet transform · distributed arithmetic algorithm · field programmable gate array

Abstract

In this article, we investigated the design and implementation aspects of multilevel discrete wavelet transform (DWT) by employing a finite impulse response filter on field programmable gate array platform. We presented two key multiplication-free architectures, namely, the distributed arithmetic algorithm (DAA) and residue number system (RNS). Our goal is to estimate the performance requirements and hardware resources for each approach, allowing for selection of the proper algorithm and implementation of multilevel DAA- and RNS-based DWT. The design has been implemented and synthesized in Xilinx Virtex 6 ML605, taking advantage of Virtex 6?s embedded block RAMs. The results reveal that the DAA-based approach is appropriate for a small number of filter taps, while the RNS-based approach would be more appropriate for more than 10 filter taps, yet both DAA- and RNS-based approaches offer high signal quality with peak signal-to-noise ratio as 73.5 and 56.5 dB, respectively.

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Bu Makaleye Atıf Yap

ALZAQ, H., ÜSTÜNDAĞ, B. B. (2018). A comparative analysis of 1-level multiplier-free discrete wavelet transform implementations on FPGAs. Turkish Journal of Electrical Engineering and Computer Science, Cilt: 26 - Sayı: 5, 2194–2205. https://ajindex.com/articles/187399

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