Journals / Istanbul University Journal of Electrical and Electronics Engineering / 2001 / Cilt: 1 - Sayı: 2

MOSFET' lerde sıcak taşıyıcıların eşik gerilimine etkisinin modellenmesi için yeni bir yaklaşım

A simple approach for modeling the influence of hot-carriers on threshold voltage of MOS transistors

Pages
201–208
Publication Date
2022-10-18
DOI
—
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AI Summary & Key Takeaways

AI Insight
⚡ TL;DR(Too Long; Didn't Read)

Using these experimental results a new method for representation of hot-carrier effect on the threshold voltage of MOS transistors is proposed.

📌 3 Key Takeaways

🎯
Objective & Hypothesis:Hot-carrier-induced degradation of MOSFET parameters over time is an important reliability concept in modern microcircuits.
📊
Key Findings & Data:High energy carriers also called hot carriers are generated in the MOSFET by the large channel electric field near the drain region.
💡
Conclusion & Impact:Using these experimental results a new method for representation of hot-carrier effect on the threshold voltage of MOS transistors is proposed.
🔬Design:Research Article
📍Scope:Comprehensive Sample
⚙️Variables:Domain Parameters

Abstract

Hot-carrier-induced degradation of MOSFET parameters over time is an important reliability concept in modern microcircuits. High energy carriers also called hot carriers are generated in the MOSFET by the large channel electric field near the drain region. The electric field accelarates the carriers to effective temperatures well above the lattice temprature. These hot carriers transfer energy to the lattice through phonon emission and break bonds at the Si/SiO2 interface. The trapping or bond breaking creates oxide charge and interface traps that effect the channel carrier mobility and the effective channel potential. Interface traps and oxide charge effect transistor performance parameters such as threshold voltage and drive currents in all operating regimes. In this paper, the influence of the hot carriers on the threshold voltage of MOS trasnsistors is examined experimentally. Using these experimental results a new method for representation of hot-carrier effect on the threshold voltage of MOS transistors is proposed.

Özet

Bu çalışmada, sıcak tasıyıcıların N-MOS tranzistorların esik gerilimi üzerindeki etkileri incelenmiş ve literatürdeki çalışmalara bir alternatif oluşturmak üzere, polinomsal eğri uydurmaya dayanan bir model önerilmiştir. Önerilen yöntemde, belirli bir proses için tranzistorun sıcak tasıyıcılardan ne şekilde etkilendiği başta deneysel olarak belirlenmekte, bu davranışa bir polinom uydurulmakta, elde edilen sonuçlar aynı proses yardımıyla üretilecek tüm tranzistorlara uygulanabilmektedir.

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Cite This Article

KAÇAR, F., KUNTMAN, H., KUNTMAN, A. (2022). MOSFET' lerde sıcak taşıyıcıların eşik gerilimine etkisinin modellenmesi için yeni bir yaklaşım. Istanbul University Journal of Electrical and Electronics Engineering, Cilt: 1 - Sayı: 2, 201–208. https://ajindex.com/articles/543969

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References (16)

  1. Mitsubishi Electric Co.,”Failure Mechanism of Semiconductor Devices”, 11-15
  2. Tekada, E., Yang, C.Y., “Hot Carrier effects in MOS Devices”, Academic Press, 1995
  3. Liou, J. J., Conde, A. O., Sanchez, F.G., “Analysis and Design of MOSFETs”, Kluwer Academic Publishers, 1998
  4. Tsividis, Y., “ Operation and modeling of the MOS transistor”, McGraw-Hill, 1999
  5. Bravaix, A., Gougenhim, D., Revil, N., Varrot, M., Mortini, P., “Effects of High Temperature On Performances And Hot- Carrier Reliability In DC/AC Stressed 0.35mm n-MOSFET ‘s”, Electronic Industries Association Publication: www.iea.org [6] Thewes, R., Brox, M., Tempel, G., Goser, K., “Channel-Length-Independent Hot Carrier Degradation In Analog p-MOS Operation”, IEEE Electron Device Letters, Vol. 13, No.11, 590-592, 1992
  6. Weber, W., Brox, M., Schwerin, A.V., Thewes, R., “Hot Carrier stress effect in p- MOSFETs: physical effects relevant for circuit operation”, Elsevier Science Pub., 22, 253-260, 1993
  7. Pan, Y., “A physical-based analytical model for the hot carrier induced saturation current degradation of p-MOSFETs”, IEEE Trans. Electron Devices, Vol. 41, No.1, 84-89, 1994
  8. Thewes, R., Weber, W., “Effects of hot Carrier degradation in analog CMOS circuits”, Micro Elec. Eng., Vol. 36, 285- 292, 1997
  9. Weber, W., “Dynamic stress experiments for understanding hot-carrier degradation phenomena”, IEEE Trans. Electron Devices, Vol.35, No.9, 1476-1486, 1988
  10. Thewes, R., “Degradation analoger CMOS Schaltungen durch heibe Ladungstrager”, Ph.D. Thesis, Universitaet Dortmund, 1995
  11. Thewes, R., Brox, M., Goser, K. F., Weber, W., “Hot carrier degradation of p- MOSFET’s under analog operation”, IEEE Trans. Electron Devices, 607-617, 1997
  12. Jang, S. L., Tang, T.H., Chen, Y.S., Sheu, C.J., “Modelling of hot carrier stressed characteristic of submicrometer p- MOSFETs”, Solid State Elec., 1043-1047, 1996
  13. Brox, M., Wohlrab, E., Weber, W., “ A phyiscal lifetime prediction method for hot carrier stressed p-MOS transistors”, IEDM Tech. Dig., 525-528, 1991
  14. Li, C.C., Quader, K.N., Minami, E.R., Hu, C., Ko, P.K., “A New bi-directional p- MOSFET hot carrier degradation model for circuit reliability simulation”, IEDM Tech. Dig., 547-550, 1992
  15. Heramans, P., Bellens, R., Groeseneken, G., Meas, H.E., “Consistent model for the hot carrier degradation in n-channel and pchannel MOSFETs”, IEEE Trans. Electron Devices, 2194-2209, 1998
  16. Brox, M., Schwerin, A.V., Wang, Q.,