Case study on a typical substation feeder bay verifies the validity and feasibility of the proposed schemer.
📌 3 Key Takeaways
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Objective & Hypothesis:In order to overcome the problem of flow collision of the integrative information transmission in the switched Ethernet for substation process-level (SESPL), this paper proposed a novel priority-based transfer scheme in the end-nodes based on the information model, in which different priorities are assigned according to different information types by using the user priority field defined in the standard IEEE 802.1, and first-come-first-served (FCFS) and static priority queuing (SPQ) scheduling algorithms are used in the switch and end-nodes respectively.
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Key Findings & Data:An implementation method through introducing a prioritization mechanism into the protocol stacks is presented.
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Conclusion & Impact:Case study on a typical substation feeder bay verifies the validity and feasibility of the proposed schemer.
🔬Design:Modeling & Simulation
📍Scope:Comprehensive Sample
⚙️Variables:Domain Parameters
Abstract
In order to overcome the problem of flow collision of the integrative information transmission in the switched Ethernet for substation process-level (SESPL), this paper proposed a novel priority-based transfer scheme in the end-nodes based on the information model, in which different priorities are assigned according to different information types by using the user priority field defined in the standard IEEE 802.1, and first-come-first-served (FCFS) and static priority queuing (SPQ) scheduling algorithms are used in the switch and end-nodes respectively. An implementation method through introducing a prioritization mechanism into the protocol stacks is presented. Case study on a typical substation feeder bay verifies the validity and feasibility of the proposed schemer.
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Cite This Article
DUAN, X., XIN, J. (2022). A priority-based transfer scheme based on information models in switched ethernet for substation process-level. Istanbul University Journal of Electrical and Electronics Engineering, Cilt: 5 - Sayı: 2, 1403–1409. https://ajindex.com/articles/543847
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