AI Summary & Key Takeaways
AI InsightFinally, the maximum clock frequency of the 4-D hyper chaotic oscillator reaches 350.733 MHz so the proposed design can be utilized as a chaotic oscillator in enhancing chaos-based communication systems on FPGA.
📌 3 Key Takeaways
Abstract
It is a common fact that warranting high security is the leading isssue in the communication systems. Since there will always be possible threats in attacking the communication channels, the trends to determine a suitable method to quarantee high security for communication systems will continue. This paper presents an FPGA-based 4-D hyper chaotic system to be utilized in the communication systems. Since the system has 9 terms two of which are nonlinear, it is one of the among simplest 4-D hyper chaotic systems. The fourth order Runge-Kutta numeric algorithm (RK4) has been utilized to obtain the discrete time tantamount of the given hyper chaotic system. IEEE 32-bit 754-1985 floating point representation of single precision has been used for defining the numbers. The whole design has been coded in Very High –Speed Integrated Circuit Hardware Description Language (VHDL). The implemented hyper chaotic system has been simulated and synthesised by utilizing Xilinx ISE Design Tools 14.7 simulation software in a Xilinx Virtex-7 XC7VX330T chip. After the Place-Route process, the statistics of chip area consumption and the clock frequency parameters have been got and analyzed. Finally, the maximum clock frequency of the 4-D hyper chaotic oscillator reaches 350.733 MHz so the proposed design can be utilized as a chaotic oscillator in enhancing chaos-based communication systems on FPGA.