AI Summary & Key Takeaways
AI InsightAccording to simulation results, the proposed op-amp has a slew rate of 0.5 V/μs, an open loop gain of 90dB with 3MHz Gain Bandwidth Product (GBP) and phase margin of 77°, and a common mode rejection ratio (CMRR) of 62dB.
📌 3 Key Takeaways
Abstract
This study introduces the design of a practical three-stage operational amplifier (op-amp) using nested Miller compensation, particularly for piezoelectric actuators. Driving a piezoelectric actuator represents a challenge in amplifier design due to its large capacitive nature. A stable piezo driver needs to be free of oscillations and phase lag. Direct feedback compensation using a conventional Miller capacitor is an effective method as long as the capacitance of the load is considerably close to the value of the Miller capacitor. However, using a large capacitor causes a decrease in the slew rate and gain bandwidth. To avoid this, our design focused on the utilization of nested Miller compensation technique. A prototype of the design working at 100V peak to peak voltage (Vpp) is implemented using commercial off-the-shelf (COTS) components. The measurements show the successful driving capability and step-response of the op-amp design. In the design, Widlar current source is also utilized for thermal stability and short circuit protection. According to simulation results, the proposed op-amp has a slew rate of 0.5 V/μs, an open loop gain of 90dB with 3MHz Gain Bandwidth Product (GBP) and phase margin of 77°, and a common mode rejection ratio (CMRR) of 62dB.