AI Summary & Key Takeaways
AI InsightIt is shown that the presence of a thin SiGe layer and/or trap states related to this layer may cause a frequency dispersion in the accumulation region of the C-V curves of MOS capacitors.
📌 3 Key Takeaways
Abstract
Metal-oxide-semiconductor (MOS) capacitors fabricated on Ge-implanted Si have been investigated by using C-V and G-V measurements. The control sample on pure Si substrate yielded normal C-V and G-V characteristics. The Ge-implanted MOS samples exhibited anomalous C-V and G-V behavior. The C-V curves of the samples were strongly frequency dependent both in the accumulation and inversion regions. They shift almost in parallel to higher values with decreasing frequency, reaching the oxide capacitance value in the quasi-static (QS) measurement. A band structure and equivalent circuit model were introduced to explain this and other features of the experimental observations. It is shown that the presence of a thin SiGe layer and/or trap states related to this layer may cause a frequency dispersion in the accumulation region of the C-V curves of MOS capacitors.
Özet
Metal-oxide-semiconductor (MOS) capacitors fabricated on Ge-implanted Si have been investigated by using C-V and G-V measurements. The control sample on pure Si substrate yielded normal C-V and G-V characteristics. The Ge-implanted MOS samples exhibited anomalous C-V and G-V behavior. The C-V curves of the samples were strongly frequency dependent both in the accumulation and inversion regions. They shift almost in parallel to higher values with decreasing frequency, reaching the oxide capacitance value in the quasi-static (QS) measurement. A band structure and equivalent circuit model were introduced to explain this and other features of the experimental observations. It is shown that the presence of a thin SiGe layer and/or trap states related to this layer may cause a frequency dispersion in the accumulation region of the C-V curves of MOS capacitors.