Journals / Erciyes Üniversitesi Fen Bilimleri Enstitüsü Fen Bilimleri Dergisi / 2024 / Cilt: 40 Sayı: 3

Exprimental Pulse Generators for Logic Structures

Lojik Yapılar için Deneysel Pulse Jeneratörleri

Recep Emir(ERCİYES ÜNİVERSİTESİ)
Sezai Alper Tekin(ERCİYES ÜNİVERSİTESİ)
Pages
462–468
Publication Date
2024-12-30
DOI
—
🏛️Bibliographic metadata and full text access for this article are provided via DergiPark.
DergiPark Record ↗
✨

AI Summary & Key Takeaways

AI Insight
⚡ TL;DR(Too Long; Didn't Read)

Additionally, both generators are evaluated in terms of some properties and advantages.

📌 3 Key Takeaways

🎯
Objective & Hypothesis:Exprimental pulse (clk) generators for logic structures are presented.
📊
Key Findings & Data:Most fundamental logic gates and complex logic circuits are operated with pulse signals.
💡
Conclusion & Impact:Additionally, both generators are evaluated in terms of some properties and advantages.
🔬Design:Araştırma Makalesi
📍Scope:Comprehensive Sample
⚙️Variables:Kare Dalga Jenaratörü · Lojik · Opamp

Abstract

Exprimental pulse (clk) generators for logic structures are presented. Most fundamental logic gates and complex logic circuits are operated with pulse signals. The main purpose of this work is to design portable generators with alkaline batteries without using electric source. The other purpose is to achieve generators with basic and easy to find components. For these purposes, two kind of pulse generators are implemented, which are based on opamp and 555 integrateds. Positive and negative alternances of generated pulse signals are adjusted to 5V and 0V, respectively, in accordance with logic 5V standart. Frequency is adjusted to 1Hz to be able to observe alternance transitions. Produced pulse signals are shown simulationally and exprimentally. Additionally, both generators are evaluated in terms of some properties and advantages.

Özet

Lojik yapılar için deneysel kare dalga (clk) jeneratörleri sunulmaktadır. Çoğu temel lojik kapılar ve karmaşık lojik devreler, kare dalga sinyalleriyle çalıştırılır. Bu makalenin temel amacı elektrik kaynağı kullanmadan alkalin pillerle çalışan taşınabilir jeneratörler tasarlamaktır. Diğer amaç ise basit ve bulunması kolay elemanlara sahip jeneratörler elde etmektir. Bu nedenlerle opamp ve 555 entegrelerine dayanan iki tür kare dalga jeneratörü uygulanmaktadır. Üretilen kare dalga sinyallerinin pozitif ve negatif genlikleri, lojik 5V standardına uygun olarak sırasıyla 5V ve 0V olarak ayarlanmıştır. Alternans geçişlerini gözlemleyebilmek için frekans 1Hz'e ayarlanmıştır. Üretilen kare dalga sinyalleri simülasyonlu ve deneysel olarak gösterilmiştir. Ek olarak, her iki jeneratör de bazı özellikleri ve avantajları açısından değerlendirilmektedir.

🔖

Cite This Article

Emir, R., Tekin, S. A. (2024). Exprimental Pulse Generators for Logic Structures. Erciyes Üniversitesi Fen Bilimleri Enstitüsü Fen Bilimleri Dergisi, Cilt: 40 Sayı: 3, 462–468. https://ajindex.com/articles/1266701

📄 Full Text PDF Viewer

📄

PDF görüntüleyici hazırlanıyor...

References (12)

  1. Sedra, A. S., Smith, K. C., Carusone, T. C., Gaudet, V., 2020. Microelectronic Circuits. 8th Edition, New York Oxford, Oxford University Press
  2. Amini-Valashani, M., Ayat, M., Mirzakuchaki, S., 2018. Design and Analysis of a Novel Low Power and Energy-Efficient 18T Hybrid Full Adder. Microelectronics Journal, 74(2018), 49-59.
  3. Mirmotahari, O., Berg, Y., 2014. Ultra Low-Voltage Statıc Precharge NAND/NOR Gates. IEEE International Nanoelectronics Conference (INEC), 28-31 July, Sapporo, Japan.
  4. Naseri, H., Timarchi, S., 2018. Low-Power and Fast Full Adder by Exploring New XOR and XNOR Gates. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26(2018), 1481-1493.
  5. Rafiee, M., Shiri, N., Sadeghi, A., 2022. High-Performance 1-Bit Full Adder with Excellent Driving Capability for Multistage Structures, IEEE Embedded Systems Letters, 14(2022), 47-50.
  6. Karimi, A., Rezai, A., Hajhashemkhani, M. M., 2019. Ultra-Low Power Pulse-Triggered CNTFET-Based Flip- Flop, IEEE Transactions on Nanotechnology, 18(2019), 756-761.
  7. Ji, H., Geng, D., Chuai, X., Duan, X., Chen, Q., Wu, W., Chen, C., Jiang, W., Jiang, J., Ling, Li L., (2022). An Advanced Full Adder Based Arithmetic Logic Unit (ALU) Using Low-Temperature Poly-Si Oxide TFTs, 69(2022), 6160-6165.
  8. Gupta, R., Gupta, R., Sharma, S., 2017. Design of high speed and low power 4-bit comparator using FGMOS. International Journal of Electronics and Communications (AEU), 2017(76), 125-131.
  9. Fowler, B., Gamal, A. E., 1994. Pulse-Modulated Analog Neuron Circuits. Analog Integrated Circuits and Signal Processing, 1994(6), 45-51.
  10. Papathanasiou, K., Brandtner, T., Hamilton, A., 2002. Palmo: Pulse-Based Signal Processing for Programmable Analog VLSI. IEEE Transactions on Circuits and Systems II-Express Briefs, 2002(49), 379- 389.
  11. Bizzarri, F., Brambilla, A., Gajani, G. S., 2011. Phase Noise Simulation in Analog Mixed Signal Circuits: An Application to Pulse Energy Oscillators. IEEE Transactions on Circuits and Systems II-Express Briefs, 2011(58), 154-158.
  12. Alçı, M., Kara, S., 2000. Elektronik Devre Tasarımında OPAMP ve Lineer Tümdevreler. Erciyes Üniversitesi, Mühendislik Fakültesi, Elektronik Mühendisliği Bölümü, Kayseri.