Journals / Electrica / 2017 / Cilt: 17 Sayı: 2

Ultra-low voltage VDBA design by using PMOS DTMOS transistors

Journal
Electrica
Pages
3463–3469
Publication Date
2017-07-27
DOI
—
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AI Summary & Key Takeaways

AI Insight
⚡ TL;DR(Too Long; Didn't Read)

The simulation results by using LTSpice Program with 0.18 μm TSMC CMOS technology model parameters are carried out to show the performance of the proposed active device and its filter applications.

📌 3 Key Takeaways

🎯
Objective & Hypothesis:In this study, a new ultra-low voltage and ultra-low power voltage differencing buffered amplifier (VDBA) based on dynamic threshold voltage MOS transistors (DTMOS) is proposed.
📊
Key Findings & Data:The total power consumption of VDBA block is found simply 6.22 nW at a 0.4 V supply voltage.
💡
Conclusion & Impact:The simulation results by using LTSpice Program with 0.18 μm TSMC CMOS technology model parameters are carried out to show the performance of the proposed active device and its filter applications.
🔬Design:Modeling & Simulation
📍Scope:Comprehensive Sample
⚙️Variables:VDBA · DTMOS · Low Voltage

Abstract

In this study, a new ultra-low voltage and ultra-low power voltage differencing buffered amplifier (VDBA) based on dynamic threshold voltage MOS transistors (DTMOS) is proposed. A voltage mode filter configuration is also presented as an application for the proposed VDBA. This filter employed two VDBA blocks and two passive components. The total power consumption of VDBA block is found simply 6.22 nW at a 0.4 V supply voltage. The simulation results by using LTSpice Program with 0.18 μm TSMC CMOS technology model parameters are carried out to show the performance of the proposed active device and its filter applications.

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Cite This Article

BAŞAK, M. E., KAÇAR, F. (2017). Ultra-low voltage VDBA design by using PMOS DTMOS transistors. Electrica, Cilt: 17 Sayı: 2, 3463–3469. https://ajindex.com/articles/1017387

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