Design of TCAM Architecture for Low Power and High Performance Applications

Abstract

Content Addressable Memory (CAM) is a special memory used in search engines for numerousapplications, especially in network routers for packet forwarding. The CAM operation beginswith pre-charging followed by evaluating the match-lines (MLs) for searching the data in thestored memory. CAM stores unique words in their array of cells such that only one word ismatched for a given search word. ML associated with matched word retains its state and theremaining MLs drain their charge. Ternary content addressable memory (TCAM) is a fast lookuphardware device used for high-speed packet forwarding. However, significant powerconsumption and high cost limits its versatility and popularity. In this paper, a design has beenmade for TCAM architecture with pre-charge controller. The pre-charge controller helps inpredicting the mismatched MLs during pre-charge phase. This prediction happens at an earlystage and helps in terminating the pre-charging of the line. This assures the design of TCAMwhich consumes low power and also improves the performance. The proposed early predict 8× 8 TCAM architecture simulations were performed in 45nm technology node using CadenceVirtuoso. The proposed TCAM design exhibits 16.6% reduction in power, 24.7% decrement indelay and 37.1% minimization in energy metric than basic TCAM NOR.